Short Title:High Frequency Design
Full Title:High Frequency Design
Language of Instruction:English
Module Code:HIFD H6001
 
Credits: 7.5
Field of Study:Electronics and automation
Module Delivered in 1 programme(s)
Reviewed By:JAMES WRIGHT
Module Author:MICHAEL BYRNE
Module Description:This module gives a student advanced understanding of real world high frequency effects in the analogue domain. This knowledge is important in the design of both analogue and digital circuit blocks, particularly high frequency CMOS circuits.
Learning Outcomes
On successful completion of this module the learner will be able to:
LO1 Develop and use high frequency transistor models for use in high frequency CMOS circuit blocks.
LO2 Plan and design high frequency analogue circuit blocks using appropriate simulation software.
LO3 Investigate variables that affect system noise performance using current research papers as a reference.
LO4 Perform appropriate testing using test and measurement equipment and a knowledge of regulatory requirements.
LO5 Implement a design using the CMOS process by applying current technological best layout practices.
LO6 Produce detailed design documentation including technical reports.
 

Module Content & Assessment

Course Work
Assessment Type Assessment Description Outcome addressed % of total Assessment Date
Assignment Example: Characterization and Analysis of NMOS and PMOS devices for a particular design process, eg On Semiconductor C5 process 1,3,4,5,6 10.00 Week 2
Assignment Example: Design, layout and simulation of a Cascode Mirror using CMOS process parameters 2,4,5,6 15.00 Week 4
Assignment Example: High Frequency CMOS Design example for specific CMOS process 1,2,4,5,6 15.00 Week 6
Assignment Detailed Design: Produce a completed Design using a CMOS process, to include physical layout, design report and simulation and verification data, tape out file for a selected design specification 2,4,5,6 40.00 Week 9
Assignment Technical Research Report The technical report must include references to relevant state of the art IEEE papers 6 20.00 n/a
No End of Module Formal Examination

TU Dublin – Tallaght Campus reserves the right to alter the nature and timings of assessment

 

Module Workload

Workload: Full Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture Interactive Lecture 2.00 Every Week 2.00
Lab Practical 1.00 Every Week 1.00
Independent Learning Assignment work 10.00 Every Week 10.00
Total Weekly Learner Workload 13.00
Total Weekly Contact Hours 3.00
Workload: Part Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture Interactive lecture 2.00 Every Week 2.00
Lab Practical 1.00 Every Week 1.00
Independent Learning Assignment work 10.00 Every Week 10.00
Total Weekly Learner Workload 13.00
Total Weekly Contact Hours 3.00
 

Module Resources

Recommended Book Resources
  • R. Jacob Baker,, CMOS Circuit Design, Layout, and Simulation, 3rd Edition [ISBN: 978-0470881323]
  • Thomas H. Lee 2004, The design of CMOS radio-frequency integrated circuits, Cambridge University Press New York [ISBN: 978-0521835398]
  • P.Allen D.R. Holberg,, Cmos Analog Circuit Design [ISBN: 978-0195392463]
  • Reinhold Ludwig, Gene Bogdanov 2009, RF circuit design, Prentice-Hall Upper Saddle River, NJ [ISBN: 978-0131471375]
This module does not have any article/paper resources
Other Resources
 

Module Delivered in

Programme Code Programme Semester Delivery
TA_EEESD_M Masters of Engineering in Electronic Engineering in Electronic System Design 1 Mandatory